Larry Pileggi
5Patents
4h-index
7Co-inventors
46Inventor score
Filing activity: Sep 5, 2001 → Nov 19, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6633182B2 | Programmable gate array based on configurable metal interconnect vias | Physics | 232 | Expired |
| US7401304B2 | Method and apparatus for thermal modeling and analysis of semiconductor chip designs | Physics | 17 | Expired |
| US7669150B2 | Statistical optimization and design method for analog and digital circuits | Physics | 6 | Active |
| US8082137B2 | Method and apparatus for thermal modeling and analysis of semiconductor chip designs | Physics | 6 | Active |
| US11249720B2 | High performance merge sort with scalable parallelization and full-throughput reduction | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.