Method of fabricating a microelectronic structure of a semiconductor on insulator type with different patterns
US7879690B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 27, 2009 |
| Grant date | Feb 1, 2011 |
| Priority date | — |
| Expiry date | Jul 27, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76254
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A microstructure of the semiconductor on insulator type with different patterns is produced by forming a stacked uniform structure including a plate forming a substrate, a continuous insulative layer and a semiconductor layer. The continuous insulative layer is a stack of at least three elementary layers, including a bottom elementary layer, at least one intermediate elementary layer, and a top elementary layer overlying the semiconductor layer, where at least one of the bottom elementary layer and the top elementary layer being of an insulative material. In the stacked uniform structure, at least two patterns are differentiated by modifying at least one of the elementary layers in one of the patterns so that the elementary layer has a significantly different physical or chemical property between the two patterns, where at least one of the bottom and top elementary layer is an insulative material that remains unchanged.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.