Inventor · South Burlington, VT, US

Mark R. LaForce

6Patents
6h-index
25Co-inventors
59Inventor score

Filing activity: Jan 24, 1990 → Oct 15, 1999

Most-cited inventions

PatentTitleAreaCited byStatus
US5001423A Dry interface thermal chuck temperature control system for semiconductor wafer testing Physics 143 Expired
US6275051A Segmented architecture for wafer test and burn-in Physics 73 Expired
US5977787A Large area multiple-chip probe assembly and method of making the same Physics 42 Expired
US6020750A Wafer test and burn-in platform using ceramic tile supports Physics 25 Expired
US6504392B2 Actively controlled heat sink for convective burn-in oven Physics 15 Expired
US6262582A Mechanical fixture for holding electronic devices under test showing adjustments in multiple degrees of freedom Emerging Cross-Sectional Technologies 14 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.