Pierre Perreau
4Patents
1h-index
12Co-inventors
41Inventor score
Filing activity: Feb 8, 2008 → Nov 23, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9520330B2 | Integrated circuit comprising PMOS transistors with different voltage thresholds | Electricity | 3 | Active |
| US8877600B2 | Method for manufacturing a hybrid SOI/bulk semiconductor wafer | Electricity | 0 | Active |
| US8382933B2 | Molecular bonding method with cleaning with hydrofluoric acid in vapor phase and rinsing with deionized water | Electricity | 0 | Active |
| US12316295B2 | Method of fabricating layers of single-crystal material | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.