Inventor · Irvine, CA, US

Pin-En Su

5Patents
3h-index
12Co-inventors
46Inventor score

Filing activity: Dec 23, 2010 → Mar 22, 2019

Most-cited inventions

PatentTitleAreaCited byStatus
US9859903B2 Method and apparatus for fast phase locked loop (PLL) settling with reduced frequency overshoot Electricity 8 Active
US8207770B1 Digital phase lock loop Electricity 7 Active
US10637493B1 Digital calibration of capacitive mismatches in analog-to-digital converters Electricity 4 Active
US9553714B2 Frequency multiplier for a phase-locked loop Electricity 1 Active
US10693484B1 Pipelined analog-to-digital converter calibration Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.