Robert Lee Ayers
7Patents
3h-index
8Co-inventors
50Inventor score
Filing activity: Oct 28, 1976 → Jun 27, 2011
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8133061B1 | Removable and replaceable dual-sided connector pin interposer | Electricity | 24 | Active |
| US4113512A | Technique for preventing forward biased epi-isolation degradation | Electricity | 3 | Expired |
| US5939897A | Method and apparatus for testing quiescent current in integrated circuits | Physics | 3 | Expired |
| US7032146B2 | Boundary scan apparatus and interconnect test method | Physics | 2 | Expired |
| US5760598A | Method and apparatus for testing quiescent current in integrated circuits | Physics | 2 | Expired |
| US8576578B2 | Robust power plane configuration in printed circuit boards | Emerging Cross-Sectional Technologies | 1 | Active |
| US7428677B2 | Boundary scan apparatus and interconnect test method | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.