Takeru Yonaga
8Patents
5h-index
9Co-inventors
52Inventor score
Filing activity: Sep 2, 1993 → Feb 23, 2007
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5444662A | Dynamic random access memory with bit line equalizing means | Physics | 38 | Expired |
| US7114113B2 | Test circuit provided with built-in self test function | Physics | 27 | Expired |
| US5420823A | Semiconductor memory with improved power supply control circuit | Physics | 18 | Expired |
| US7225379B2 | Circuit and method for testing semiconductor device | Physics | 6 | Expired |
| US7249295B2 | Test circuit for semiconductor device | Physics | 5 | Expired |
| US7333372B2 | Reset circuit and integrated circuit device with reset function | Physics | 4 | Expired |
| US7437645B2 | Test circuit for semiconductor device | Physics | 3 | Active |
| US5790470A | Decoder circuit having a predecoder acitivated by a reset signal | Physics | 1 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.