Inventor · Mansfield, TX, US

Terry Lines

10Patents
4h-index
9Co-inventors
45Inventor score

Filing activity: Apr 3, 2001 → Aug 26, 2008

Most-cited inventions

PatentTitleAreaCited byStatus
US7410879B1 System and method for providing a dual via architecture for thin film resistors Electricity 22 Expired
US7332403B1 System and method for providing a buried thin film resistor having end caps defined by a dielectric mask Electricity 14 Expired
US6703670B1 Depletion-mode transistor that eliminates the need to separately set the threshold voltage of the depletion-mode transistor Electricity 7 Expired
US7829428B1 Method for eliminating a mask layer during thin film resistor manufacturing Electricity 4 Active
US7808048B1 System and method for providing a buried thin film resistor having end caps defined by a dielectric mask Electricity 3 Active
US7144795B1 Method for forming a depletion-mode transistor that eliminates the need to separately set the threshold voltage of the depletion-mode transistor Electricity 3 Expired
US7172973B1 System and method for selectively modifying a wet etch rate in a large area Electricity 2 Expired
US7161216B1 Depletion-mode transistor that eliminates the need to separately set the threshold voltage of the depletion-mode transistor Electricity 1 Expired
US7960240B1 System and method for providing a dual via architecture for thin film resistors Electricity 0 Active
US7867871B1 System and method for increasing breakdown voltage of LOCOS isolated devices Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.