Vincent Ho
5Patents
2h-index
17Co-inventors
40Inventor score
Filing activity: Oct 1, 2003 → Jul 14, 2011
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7993997B2 | Poly profile engineering to modulate spacer induced stress for device enhancement | Electricity | 3 | Active |
| US7901988B2 | Method for forming a package-on-package structure | Electricity | 2 | Active |
| US6962850B2 | Process to manufacture nonvolatile MOS memory device | Emerging Cross-Sectional Technologies | 1 | Expired |
| US8519445B2 | Poly profile engineering to modulate spacer induced stress for device enhancement | Electricity | 0 | Active |
| US7879673B2 | Patterning nanocrystal layers | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.