Inventor · Fremont, CA, US

Vivek Trivedi

14Patents

3h-index

18Co-inventors

57Inventor score

Filing activity: Jun 9, 2003 → Nov 10, 2023

Most-cited inventions

Patent	Title	Area	Cited by	Status
US8683416B1	Integrated circuit optimization	Physics	24	Active
US7299433B2	Timing analysis apparatus, systems, and methods	Physics	11	Expired
US9443053B2	System for and method of placing clock stations using variable drive-strength clock drivers built out of a smaller subset of base cells for hybrid tree-mesh clock distribution networks	Physics	4	Active
US11150687B1	Low-latency retimer with seamless clock switchover	Electricity	3	Active
US11258696B1	Low-latency signaling-link retimer	Electricity	1	Active
US11487317B1	Low-latency retimer with seamless clock switchover	Electricity	1	Active
US12277002B1	Low-latency retimer with seamless clock switchover	Electricity	0	Active
US9390209B2	System for and method of combining CMOS inverters of multiple drive strengths to create tune-able clock inverters of variable drive strengths in hybrid tree-mesh clock distribution networks	Emerging Cross-Sectional Technologies	0	Active
US10198389B2	Baseboard interconnection device, system and method	Electricity	0	Active
US9098664B2	Integrated circuit optimization	Physics	0	Active
US11327913B1	Configurable-aggregation retimer with media-dedicated controllers	Emerging Cross-Sectional Technologies	0	Active
US9305129B2	System for and method of tuning clock networks constructed using variable drive-strength clock inverters with variable drive-strength clock drivers built out of a smaller subset of base cells	Physics	0	Active
US11853115B1	Low-latency retimer with seamless clock switchover	Electricity	0	Active
US12143288B1	Low-latency signaling-link retimer	Electricity	0	Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.