Methods of forming 3-D integrated semiconductor devices having intermediate heat spreading capabilities

US10014279B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Thomas Werner · Radebeul, DE
• Michael Grillberger · Radebeul, DE
• Frank Feustel · Dresden, DE

Key dates

• Filing date: Mar 9, 2016
• Grant date: Jul 3, 2018
• Expiry date: Mar 15, 2036

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/1305
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

In a method of forming a three-dimensional semiconductor device, a first chip is provided that includes a first substrate, a first device layer positioned on and covering the first substrate, and a first metallization system positioned on and covering the first device layer, wherein the first device layer includes a plurality of first transistor elements. A second chip is also provided and includes a second substrate, a second device layer positioned on and covering the second substrate, and a second metallization system positioned on and covering the second device layer, wherein the second device layer includes a plurality of second transistor elements. The second chip is attached to the first chip so that a heat spreading material is positioned between the first chip and the second chip and covers at least a portion of the first metallization system.