Method for manufacturing a resistive device for a memory or logic circuit
US10056266B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Oct 15, 2015 |
| Grant date | Aug 21, 2018 |
| Priority date | — |
| Expiry date | Oct 15, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8833
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
A method for manufacturing a resistive device, includes depositing a first electrically conductive layer on a substrate; forming an etching mask on the first conductive layer; etching the first conductive layer through the mask, such as to obtain a plurality of electrically conductive pillars separated from one another; and forming storage elements with variable electrical resistance at the tops of the electrically conductive pillars, such that each storage element is supported by one of the electrically conductive pillars, the step of forming the storage elements including the following operations depositing a first layer by non-collimated cathode sputtering at normal incidence relative to the substrate; and depositing a second layer on the first layer by cathode sputtering, the second layer including a first chemical species sputtered at an oblique incidence.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.