Patent · US Active

Molded package with chip carrier comprising brazed electrically conductive layers

US10074590B1 · kind B1 · utility

5Cited by

0References

30Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Mark Pavier · Felbridge, GB
Wolfram Hable · Dresden, DE
Angela Kessler · Regensburg, DE
Michael Sielaff · Erwitte, DE
Anton Pugatschow · Soest, DE
Charles Rimbert-Riviere · Soest, DE
Marco Sobkowiak · Warstein, DE

Key dates

Filing date	Jul 13, 2017
Grant date	Sep 11, 2018
Priority date	—
Expiry date	Jul 13, 2037

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/19107
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A package which comprises a chip carrier, at least one electronic chip mounted on the chip carrier, an electrically conductive contact structure electrically coupled with the at least one electronic chip, and a mold-type encapsulant encapsulating part of the electrically conductive contact structure, and at least part of the chip carrier and of the at least one electronic chip, wherein the chip carrier comprises a thermally conductive and electrically insulating core covered on both opposing main surfaces thereof by a respective brazed electrically conductive layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.