Methods of forming metallization lines on integrated circuit products and the resulting products
US10079173B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 4, 2016 |
| Grant date | Sep 18, 2018 |
| Priority date | — |
| Expiry date | Oct 4, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/853
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
One illustrative method disclosed includes, among other things, forming a layer of insulating material comprising a first insulating material above a substrate and forming a metallization blocking structure in the layer of insulating material at a location that is in a path of a metallization trench to be formed in the layer of insulating material, the metallization blocking structure comprising a second insulating material that is different from the first insulating material. The method also includes forming the metallization trench in the layer of insulating material on opposite sides of the metallization blocking structure and forming a conductive metallization line in the metallization trench on opposite sides of the metallization blocking structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.