Method of making a semiconductor device with a buried insulating layer formed by annealing a superlattice
US10109479B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 31, 2017 |
| Grant date | Oct 23, 2018 |
| Priority date | — |
| Expiry date | Jul 31, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/324
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for making a semiconductor device may include forming a superlattice on a semiconductor substrate including a respective plurality of stacked groups of layers. Each group of layers may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. Further, at least some semiconductor atoms from opposing base semiconductor portions may be chemically bound together through the at least one non-semiconductor monolayer therebetween. The method may further include epitaxially forming a semiconductor layer on the superlattice, and annealing the superlattice to form a buried insulating layer in which the at least some semiconductor atoms are no longer chemically bound together through the at least one non-semiconductor monolayer therebetween.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.