Graphics processing hardware for using compute shaders as front end for vertex shaders
US10134102B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 5, 2014 |
| Grant date | Nov 20, 2018 |
| Priority date | — |
| Expiry date | Sep 11, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T15/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A GPU is configured to read and process data produced by a compute shader via the one or more ring buffers and pass the resulting processed data to a vertex shader as input. The GPU is further configured to allow the compute shader and vertex shader to write through a cache. Each ring buffer is configured to synchronize the compute shader and the vertex shader to prevent processed data generated by the compute shader that is written to a particular ring buffer from being overwritten before the data is accessed by the vertex shader. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.