Semiconductor device for a non-volatile (NV) resistive memory and array structure for an array of NV resistive memory
US10192927B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 8, 2016 |
| Grant date | Jan 29, 2019 |
| Priority date | — |
| Expiry date | Nov 19, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/884
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a resistive switching device. The method includes providing a substrate having a surface region and forming a first dielectric material overlying the surface region. A first wiring structure is formed overlying the first dielectric material. The method forms one or more first structure comprising a junction material overlying the first wiring structure. A second structure comprising a stack of material is formed overlying the first structure. The second structure includes a resistive switching material, an active conductive material overlying the resistive switching material, and a second wiring material overlying the active conductive material. The second structure is configured such that the resistive switching material is free from a coincident vertical sidewall region with the junction material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.