Method, apparatus and system for a high density middle of line flow
US10236350B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 11, 2016 |
| Grant date | Mar 19, 2019 |
| Priority date | — |
| Expiry date | May 7, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/667
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
At least one method, apparatus and system disclosed herein for forming a finFET device. A gate structure comprising a gate spacer on a semiconductor wafer is formed. A self-aligned contact (SAC) cap is formed over the gate structure. A TS structure is formed. At least one M0 metal structure void is formed. At least one CB structure void adjacent the M0 metal structure void is formed. An etch process is performed the M0 and CB structures voids to the gate structure. At least one CA structure void adjacent the CB structure void is formed. The M0, CB, and CA structure voids are metallized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.