Methods and apparatus for three-dimensional nonvolatile memory
US10283567B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 24, 2017 |
| Grant date | May 7, 2019 |
| Priority date | — |
| Expiry date | Feb 24, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8836
Abstract
A method is provided that includes forming a word line above a substrate, the word line disposed in a first direction, forming a bit line above the substrate, the bit line disposed in a second direction perpendicular to the first direction, forming a nonvolatile memory material between the word line and the bit line, the nonvolatile memory material including a semiconductor material layer and conductive oxide material layer, forming a first barrier material layer between the word line and the nonvolatile memory material, forming a second barrier material layer between the bit line and the nonvolatile memory material, and forming a memory cell including the nonvolatile memory material at an intersection of the bit line and the word line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.