Power semiconductor device with dV/dt controllability and cross-trench arrangement

US10304952B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Matteo Dainese · Munich, DE
• Alexander Philippou · Munich, DE
• Markus Bina · Sauerlach, DE
• Ingo Dirnstorfer · Eindhoven, NL
• Erich Griebl · Dorfen, DE
• Christian Jaeger · Munich, DE
• Johannes Georg Laven · Taufkirchen, DE
• Caspar Leendertz · Munich, DE
• Frank Pfirsch · Birkenfeld, DE

Key dates

• Filing date: May 25, 2018
• Grant date: May 28, 2019
• Expiry date: May 25, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/112

Abstract

A power semiconductor device includes an active region surrounded by an inactive termination region each formed by part of a semiconductor body. The active region conducts load current between first and second load terminals. At least one power cell has trenches extending into the semiconductor body adjacent to each other along a first lateral direction and having a stripe configuration that extends along a second lateral direction into the active region. The trenches spatially confine a plurality of mesas each having at least one first type mesa electrically connected to the first load terminal and configured to conduct at least a part of the load current, and at least one second type mesa configured to not conduct the load current. A decoupling structure separates at least one of the second type mesas into a first section in the active region and a second section in the termination region.