Hybrid gate-all-around (GAA) field effect transistor (FET) structure and method of forming

US10332803B1 · kind B1 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Ruilong Xie · Niskayuna, US
• Edward J. Nowak · South Burlington, US
• Bipul C. Paul · Sunnyvale, US
• Steven R. Soss · Patterson, US
• Julien Frougier · Albany, US
• Daniel Chanemougame · Niskayuna, US
• Lars Liebmann · Poughquag, US

Key dates

• Filing date: May 8, 2018
• Grant date: Jun 25, 2019
• Expiry date: May 8, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/02532
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Various embodiments relate to gate-all-around (GAA) transistors and methods of forming such transistors. In some embodiments, a method performed on a precursor structure includes selectively removing a sacrificial nanosheet to open a vertical gap between a pair of semiconductor nanosheets; forming a first work function metal to surround the precursor nanosheet stack and fin, the first work function metal filling the vertical gap between the pair of semiconductor nano sheets; selectively removing first work function metal surrounding the fin while preserving an entirety of first work function metal surrounding the nanosheet stack; and forming a second work function metal: over a remaining portion of the first work function metal on nanosheet stack, and surrounding the fin, where first work function metal includes a different material than second work function metal.