Performing concurrent diffusion break, gate and source/drain contact cut etch processes
US10522410B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 20, 2018 |
| Grant date | Dec 31, 2019 |
| Priority date | — |
| Expiry date | Apr 20, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/834
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A device is formed including fins formed above a substrate, an isolation structure between the fins, a plurality of structures defining gate cavities, and a first dielectric material positioned between the structures. A patterning layer above the first dielectric material and in the gate cavities has a first opening positioned above a first gate cavity exposing a portion of the isolation structure and defining a first recess, a second opening above a second gate cavity exposing a first portion of the fins, and a third opening above a first portion of a source/drain region in the fins to expose the first dielectric material. Using the patterning layer, a second recess is formed in the substrate and a third recess is defined in the first dielectric material. A second dielectric material is formed in the recesses to define a gate cut structure, a diffusion break structure, and a contact cut structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.