Method of integrated circuit fabrication with dual metal power rail
US10580691B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 6, 2018 |
| Grant date | Mar 3, 2020 |
| Priority date | — |
| Expiry date | Aug 14, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/53266
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A substrate processing method is provided for metal filling of recessed features in a substrate. According to one embodiment, the method includes providing a substrate containing horizontally spaced nested and isolated recessed features, filling the nested and isolated recessed features with a blocking material, and performing in any order: a) sequentially first, removing the blocking material from the nested recessed features, and second, filling the nested recessed features with a first metal, and b) sequentially first, removing the blocking material from the isolated recessed features, and second, filling the isolated recessed features with a second metal that is different from the first metal. According to one embodiment, the first metal may include Ru metal and the second metal may include Cu metal. According to one embodiment, a microelectronic device containing metal filled recessed features is provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.