Distributed decoupling capacitor
US10593663B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 12, 2016 |
| Grant date | Mar 17, 2020 |
| Priority date | — |
| Expiry date | Oct 17, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/5286
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electrical device including a plurality of fin structures. The plurality of fin structures including at least one decoupling fin and at least one semiconductor fin. The electrical device includes at least one semiconductor device including a channel region present in the at least one semiconductor fin, a gate structure present on the channel region of the at least one semiconductor fin, and source and drain regions present on source and drain region portion of the at least one semiconductor fin. The electrical device includes at least one decoupling capacitor including the decoupling fin structure as a first electrode of the decoupling capacitor, a node dielectric layer and a second electrode provided by the metal contact to the source and drain regions of the semiconductor fin structures. The decoupling capacitor is present underlying the power line to the semiconductor fin structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.