LDMOS transistor and method
US10672686B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 8, 2019 |
| Grant date | Jun 2, 2020 |
| Priority date | — |
| Expiry date | Aug 8, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/112
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a conductive through substrate via includes forming an opening in a first surface of a semiconductor substrate comprising a LDMOS transistor structure in the first surface, forming a first conductive layer in a first portion of the opening in the semiconductor substrate using first deposition parameters such that the first conductive layer fills the opening in the first portion, and forming a second conductive layer on the first conductive layer in a second portion of the opening using second deposition parameters such that the second conductive layer bounds a gap in the second portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.