Semiconductor device and method of forming a fan-out PoP device with PWB vertical interconnect units
US10707150B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 9, 2018 |
| Grant date | Jul 7, 2020 |
| Priority date | — |
| Expiry date | Jul 9, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device has a semiconductor package and an interposer disposed over the semiconductor package. The semiconductor package has a first semiconductor die and a modular interconnect unit disposed in a peripheral region around the first semiconductor die. A second semiconductor die is disposed over the interposer opposite the semiconductor package. An interconnect structure is formed between the interposer and the modular interconnect unit. The interconnect structure is a conductive pillar or stud bump. The modular interconnect unit has a core substrate and a plurality of vertical interconnects formed through the core substrate. A build-up interconnect structure is formed over the first semiconductor die and modular interconnect unit. The vertical interconnects of the modular interconnect unit are exposed by laser direct ablation. An underfill is deposited between the interposer and semiconductor package. A total thickness of the semiconductor package and build-up interconnect structure is less than 0.4 millimeters.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.