Memory first process flow and device

US10818761B2 · kind B2 · utility

Assignee

• Cypress Semiconductor Corporation · US

Inventors

• Shenqing Fang · Fremont, US
• Chun Chen · San Jose, US
• Unsoon Kim · San Jose, US
• Mark T. Ramsbey · Sunnyvale, US
• Kuo-Tung Chang · Saratoga, US
• Sameer Haddad · San Jose, US
• James Pak · Sunnyvale, US

Key dates

• Filing date: Jul 19, 2019
• Grant date: Oct 27, 2020
• Expiry date: Jul 19, 2039

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/693
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A semiconductor device and method of making the same are disclosed. The semiconductor device includes a memory gate on a charge storage structure formed on a substrate, a select gate on a gate dielectric on the substrate proximal to the memory gate, and a dielectric structure between the memory gate and the select gate, and adjacent to sidewalls of the memory gate and the select gate, wherein the memory gate and the select gate are separated by a thickness of the dielectric structure. Generally, the dielectric structure comprises multiple dielectric layers including a first dielectric layer adjacent the sidewall of the memory gate, and a nitride dielectric layer adjacent to the first dielectric layer and between the memory gate and the select gate. Other embodiments are also disclosed.