Heterojunction bipolar transistors with an inverted crystalline boundary in the base layer

US10818772B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Vibhor Jain · Williston, US
• Pernell Dongmo · South Burlington, US
• Cameron E. Luce · Colchester, US
• James W. Adkisson · Jericho, US
• Qizhi Liu · South Burlington, US

Key dates

• Filing date: Apr 24, 2018
• Grant date: Oct 27, 2020
• Expiry date: May 11, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/177

Abstract

Fabrication methods and device structures for a heterojunction bipolar transistor. A trench isolation region is formed that surrounds an active region of semiconductor material, a collector is formed in the active region, and a base layer is deposited that includes a first section over the trench isolation region, a second section over the active region, and a third section over the active region that connects the first section and the second section. An emitter is arranged over the second section of the base layer, and an extrinsic base layer is arranged over the first section of the base layer and the third section of the base layer. The extrinsic base layer includes a first section containing polycrystalline semiconductor material and a second section containing single-crystal semiconductor material. The first and second sections of the extrinsic base layer intersect along an interface that extends over the trench isolation region.