Patent · US Active

Semiconductor package system

US10886186B2 · kind B2 · utility

1Cited by
3References
24Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 27, 2019
Grant dateJan 5, 2021
Priority date
Expiry dateMar 27, 2039

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/1815
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor package system comprises a semiconductor package and a cap. The semiconductor package comprises a die pad, a chip mounted or arranged to a first main face of the die pad and an encapsulation body encapsulating the chip and the die pad. The cap covers at least partly an exposed second main face of the die pad. The cap comprises a cap body of an electrically insulating and thermally conductive material and a fastening system fastening the cap to the semiconductor package. The fastening system extends from the cap body towards the encapsulation body or along a side surface of the semiconductor package.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.