Mitigating cracking within integrated circuit (IC) device carrier
US10985129B2 · kind B2 · utility
0Cited by
6References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 15, 2019 |
| Grant date | Apr 20, 2021 |
| Priority date | — |
| Expiry date | May 10, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3512
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Multiple integrated circuit (IC) devices are connected to a top side metallization surface of a multi IC device carrier. The carrier includes resin based substrate layers and associated wiring line layers. To reduce stain of the resin layers, especially in region(s) within the carrier between the IC devices, a stiffener or stiffeners are applied to the back side metallization (BSM) surface of the IC device carrier. The stiffener(s) reduce the amount of curvature of the IC device carrier and reduce the strain seen by the resin layer(s), thereby mitigating the risk for cracks forming and expanding within the resin layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.