Steve Ostrander
14Patents
1h-index
33Co-inventors
50Inventor score
Filing activity: Aug 11, 2009 → Feb 18, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10580738B2 | Direct bonded heterogeneous integration packaging structures | Electricity | 4 | Active |
| US8129230B2 | Underfill method and chip package | Electricity | 1 | Active |
| US11031373B2 | Spacer for die-to-die communication in an integrated circuit | Electricity | 1 | Active |
| US10916507B2 | Multiple chip carrier for bridge assembly | Electricity | 0 | Active |
| US10833051B2 | Precision alignment of multi-chip high density interconnects | Electricity | 0 | Active |
| US11404287B2 | Fixture facilitating heat sink fabrication | Electricity | 0 | Active |
| US10978313B2 | Fixture facilitating heat sink fabrication | Electricity | 0 | Active |
| US10985129B2 | Mitigating cracking within integrated circuit (IC) device carrier | Electricity | 0 | Active |
| US8492910B2 | Underfill method and chip package | Electricity | 0 | Active |
| US11177217B2 | Direct bonded heterogeneous integration packaging structures | Electricity | 0 | Active |
| US10892233B2 | Mitigating moisture-driven degradation of features designed to prevent structural failure of semiconductor wafers | Electricity | 0 | Active |
| US11152226B2 | Structure with controlled capillary coverage | Electricity | 0 | Active |
| US11569181B2 | Mitigating moisture-driven degradation of features designed to prevent structural failure of semiconductor wafers | Electricity | 0 | Active |
| US11521952B2 | Spacer for die-to-die communication in an integrated circuit and method for fabricating the same | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.