Nanosheet field effect transistor with spacers between sheets

US11101348B2 · kind B2 · utility

Assignee

• GLOBALFOUNDRIES U.S. Inc. · US

Inventors

• Ruilong Xie · Niskayuna, US
• Julien Frougier · Albany, US
• Nigel G. Cave · Austin, US
• Steven R. Soss · Patterson, US
• Daniel Chanemougame · Niskayuna, US
• Steven Bentley · Menands, US
• Rohit Galatage · Clifton Park, US
• Bum Ki Moon · Oshima, JP

Key dates

• Filing date: Jul 25, 2018
• Grant date: Aug 24, 2021
• Expiry date: Jul 25, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/83
• WIPO field: Micro-structural and nano-technology
• WIPO sector: Chemistry

Abstract

Methods form devices by creating openings in sacrificial gates between nanosheet stacks (alternating layers of a first material and channel structures), forming spacers in the openings, and removing the sacrificial gates to leave the spacers. The first material is then removed from between the channel structures. A first work function metal is formed around and between the channel structures. Next, first stacks (of the stacks) are protected with a mask to leave second stacks (of the stacks) exposed. Then, the first work function metal is removed from the second stacks while the first stacks are protected by the mask and the spacers. Subsequently, a second work function metal is formed around and between the channel structures of the second stacks. A gate material is then formed over the first work function metal and the second work function metal.