Patent · US Active

Topside-cooled semiconductor package with molded standoff

US11239127B2 · kind B2 · utility

0Cited by

5References

20Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Edward Myers · Munich, DE
Liu Chen · Munich, DE
Chee Chiew Chong · Batu Caves, MY
Wee Aun Jason Lim · Melaka City, MY
Wee Boon Tay · Melaka City, MY

Key dates

Filing date	Jun 19, 2020
Grant date	Feb 1, 2022
Priority date	—
Expiry date	Jul 30, 2040

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/00014
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A molded semiconductor package arrangement may comprise a die pad configured to support a semiconductor; a set of leads; and a mold structure that is formed to enclose the semiconductor and the die pad within the mold structure. The set of leads and the die pad may be formed from a same piece of conductive material. An electrical contact plane of the set of leads may be offset from a bottom surface of the die pad. The mold structure may include a molded standoff that is beneath the die pad. A bottom surface of the molded standoff may extend below the electrical contact plane of the set of leads by a threshold distance that corresponds to a thickness of the molded standoff.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.