Separate partition for buffer and snapshot memory

US11385819B2 · kind B2 · utility

Assignee

• Micron Technology, Inc. · US

Inventors

• Kishore Kumar Muchherla · Fremont, US
• Niccolo' Righetti · Boise, US
• Jeffrey S. McNeil · Nampa, US
• Akira Goda · Boise, US
• Todd A. Marquart · Boise, US
• Mark A. Helm · Boise, US
• Gil Golov · Backnang, DE
• Jeremy Binfet · Boise, US
• Carmine Miccoli · Boise, US
• Giuseppina Puzzilli · Boise, US

Key dates

• Filing date: Aug 17, 2020
• Grant date: Jul 12, 2022
• Expiry date: Aug 17, 2040

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F3/0679
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A system includes a processing device and trigger circuitry to signal the processing device responsive, at least in part, based on a determination that a trigger event has occurred. The system can further include a memory device communicatively coupled to the processing device. The memory device can include a cyclic buffer partition portion having a first endurance characteristic and a first reliability characteristic associated therewith. The memory device can further include a snapshot partition portion coupled to the cyclic buffer partition portion via hold-up capacitors. The snapshot partition portion can have a second endurance characteristic and a second reliability characteristic associated therewith. The processing device can perform operations including writing received data sequentially to the cyclic buffer partition portion and writing, based at least in part on the determination that the trigger event has occurred, data from the cyclic buffer partition portion to the snapshot partition portion.