Vertical transistor having an oxygen-blocking top spacer
US11476346B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2020 |
| Grant date | Oct 18, 2022 |
| Priority date | — |
| Expiry date | Jul 9, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/151
Abstract
Embodiments of the invention are directed to a method of forming a semiconductor device. A non-limiting example of the method includes forming a top spacer trench adjacent to an upper region of the channel fin. An oxygen-blocking layer is deposited within the top spacer trench and over the upper region of the channel fin. A top spacer is formed within the top spacer trench and over a portion of the oxygen-blocking layer that is within the top spacer trench. The oxygen-blocking layer includes an oxygen gettering material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.