Semiconductor processing chambers for deposition and etch
US11699571B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 8, 2020 |
| Grant date | Jul 11, 2023 |
| Priority date | — |
| Expiry date | May 12, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2237/20235
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Exemplary semiconductor substrate supports may include a pedestal shaft. The semiconductor substrate supports may include a platen. The platen may define a fluid channel across a first surface of the platen. The semiconductor substrate supports may include a platen insulator positioned between the platen and the pedestal shaft. The semiconductor substrate supports may include a conductive puck coupled with the first surface of the platen and configured to contact a substrate supported on the semiconductor substrate support. The semiconductor substrate supports may include a conductive shield extending along a backside of the platen insulator and coupled between a portion of the platen insulator and the pedestal shaft.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.