Patent · US Active

Scalar core integration

US11762804B2 · kind B2 · utility

1Cited by
6References
24Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 19, 2022
Grant dateSep 19, 2023
Priority date
Expiry dateJul 19, 2042

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/3836
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Methods and apparatus relating to scalar core integration in a graphics processor. In an example, an apparatus comprises a processor to receive a set of workload instructions for a graphics workload from a host complex, determine a first subset of operations in the set of operations that is suitable for execution by a scalar processor complex of the graphics processing device and a second subset of operations in the set of operations that is suitable for execution by a vector processor complex of the graphics processing device, assign the first subset of operations to the scalar processor complex for execution to generate a first set of outputs, assign the second subset of operations to the vector processor complex for execution to generate a second set of outputs. Other embodiments are also disclosed and claimed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.