Varghese George
148Patents
14h-index
166Co-inventors
89Inventor score
Filing activity: Jun 16, 1999 → May 22, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6823418B2 | Virtual PCI device apparatus and method | Physics | 66 | Expired |
| US7149645B2 | Method and apparatus for accurate on-die temperature measurement | Physics | 56 | Expired |
| US6785829B1 | Multiple operating frequencies in a processor | Emerging Cross-Sectional Technologies | 46 | Expired |
| US6704877B2 | Dynamically changing the performance of devices in a computer platform | Physics | 38 | Expired |
| US11113784B2 | Sparse optimizations for a matrix accelerator architecture | Physics | 36 | Active |
| US11361496B2 | Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point format | Physics | 34 | Active |
| US11620256B2 | Systems and methods for improving cache efficiency and utilization | Physics | 32 | Active |
| US7650518B2 | Method, apparatus, and system for increasing single core performance in a multi-core microprocessor | Physics | 28 | Active |
| US6988211B2 | System and method for selecting a frequency and voltage combination from a table using a selection field and a read-only limit field | Emerging Cross-Sectional Technologies | 25 | Expired |
| US10803548B2 | Disaggregation of SOC architecture | Emerging Cross-Sectional Technologies | 19 | Active |
| US6772241B1 | Selective interrupt delivery to multiple processors having independent operating systems | Emerging Cross-Sectional Technologies | 19 | Expired |
| US6636939B1 | Method and apparatus for processor bypass path to system memory | Physics | 18 | Expired |
| US8806248B2 | Method, apparatus, and system for optimizing frequency and performance in a multidie microprocessor | Emerging Cross-Sectional Technologies | 18 | Active |
| US6502218B1 | Deferred correction of a single bit storage error in a cache tag array | Physics | 17 | Expired |
| US7370189B2 | Method and apparatus for establishing safe processor operating points in connection with a secure boot | Emerging Cross-Sectional Technologies | 14 | Expired |
| US8032772B2 | Method, apparatus, and system for optimizing frequency and performance in a multi-die microprocessor | Emerging Cross-Sectional Technologies | 12 | Active |
| US7299370B2 | Method and apparatus for improved reliability and reduced power in a processor by automatic voltage control during processor idle states | Emerging Cross-Sectional Technologies | 12 | Expired |
| US7210054B2 | Maintaining processor execution during frequency transitioning | Physics | 12 | Expired |
| US7061274B2 | Self-programmable bidirectional buffer circuit and method | Electricity | 11 | Expired |
| US6976099B2 | Selective interrupt delivery to multiple processors having independent operating systems | Emerging Cross-Sectional Technologies | 10 | Expired |
| US8065555B2 | System and method for error correction in cache units | Physics | 10 | Active |
| US7917787B2 | Method, apparatus and system to dynamically choose an aoptimum power state | Physics | 10 | Active |
| US9600413B2 | Common platform for one-level memory architecture and two-level memory architecture | Physics | 9 | Active |
| US7290155B2 | Method, system, and apparatus for dynamically configuring the operating point utilized for thermal management of an integrated circuit | Emerging Cross-Sectional Technologies | 9 | Expired |
| US7205793B2 | Self-programmable bidirectional buffer circuit and method | Electricity | 8 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.