Block family-based error avoidance for memory devices
US11886726B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 6, 2021 |
| Grant date | Jan 30, 2024 |
| Priority date | — |
| Expiry date | Dec 29, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/4402
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An example memory sub-system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is configured to initialize a block family associated with a memory device; initialize a timeout associated with the block family; initializing a low temperature and a high temperature using a reference temperature at the memory device; responsive to programming a block residing on the memory device, associate the block with the block family; and responsive to at least one of: detecting expiration of the timeout or determining that a difference between the high temperature and the low temperature is greater than or equal to a specified threshold temperature value, close the block family.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.