Reverse selective etch stop layer

US11955382B2 · kind B2 · utility

Assignee

• Applied Materials, Inc. · US

Inventors

• Kevin Kashefi · San Ramon, US
• Alexander Jansen · San Jose, US
• Mehul Naik · San Jose, US
• He Ren · San Jose, US
• Lu Chen · Pingtung City, TW
• Feng Chen · San Jose, US

Key dates

• Filing date: Dec 3, 2020
• Grant date: Apr 9, 2024
• Expiry date: Jun 17, 2041

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/76897
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Methods and apparatus for forming a reverse selective etch stop layer are disclosed. Some embodiments of the disclosure provide interconnects with lower resistance than methods which utilize non-selective (e.g., blanket) etch stop layers. Some embodiments of the disclosure utilize reverse selective etch stop layers within a subtractive etch scheme. Some embodiments of the disclosure selectively deposit the etch stop layer by passivating the surface of the metal material.