Inter-tier power delivery network (PDN) for dense gate-on-gate 3D logic integration

US12176293B2 · kind B2 · utility

Assignee

• TOKYO ELECTRON LIMITED · JP

Inventors

• Lars Liebmann · Poughquag, US
• Jeffrey Smith · Clifton Park, US
• Daniel Chanemougame · Niskayuna, US
• Paul Gutwin · Williston, US
• Brian Tracy Cline · Austin, US
• Xiaoqing Xu · Austin, US
• David Victor Pietromonaco · San Jose, US

Key dates

• Filing date: Dec 3, 2021
• Grant date: Dec 24, 2024
• Expiry date: Jan 25, 2043

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2225/06541
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Aspects of the present disclosure provide a multi-tier semiconductor structure. For example, the multi-tier semiconductor structure can include a lower semiconductor device tier, and a lower signal wiring structure electrically connected to the lower semiconductor device tier. The multi-tier semiconductor structure can further include a primary power delivery network (PDN) structure disposed over the lower semiconductor device tier and the lower signal wiring structure and electrically connected to the lower semiconductor device tier. The multi-tier semiconductor structure can further include an upper semiconductor device tier disposed over and electrically connected the first PDN structure, and an upper signal wiring structure disposed over the primary PDN structure and electrically connected to the upper semiconductor device tier.