Patent · US Active

Rounding hexadecimal floating point numbers using binary incrementors

US12190078B2 · kind B2 · utility

0Cited by
6References
20Claims
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Key dates

Filing dateMar 25, 2022
Grant dateJan 7, 2025
Priority date
Expiry dateApr 22, 2042

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2207/3844
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Rounding hexadecimal floating point numbers using binary incrementors, including: incrementing, by a first incrementor, a first subset of bits of an operand comprising a binary hexadecimal floating point operand; incrementing, by a second incrementor, a second subset of bits of the operand; generate an intermediate result based on a carryout of the second incrementor; and generate an incremented result based on a carryout of the first incrementor and one or more of: a first bit of the intermediate result or the carryout of the second incrementor.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.