Forming an oxide volume within a fin

US12224202B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Cheng-Ying Huang
• Gilbert Dewey · Beaverton, US
• Jack T. Kavalieros · Portland, US
• Aaron D. Lilak · Beaverton, US
• Ehren Mannebach · Beaverton, US
• Patrick Morrow · Portland, US
• Anh Phan · Beaverton, US
• Willy Rachmady · Beaverton, US
• Hui Jae Yoo · Hillsboro, US

Key dates

• Filing date: Jul 21, 2023
• Grant date: Feb 11, 2025
• Expiry date: Jul 21, 2043

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D88/01
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Embodiments of the present disclosure may generally relate to systems, apparatus, and/or processes to form volumes of oxide within a fin, such as a Si fin. In embodiments, this may be accomplished by applying a catalytic oxidant material on a side of a fin and then annealing to form a volume of oxide. In embodiments, this may be accomplished by using a plasma implant technique or a beam-line implant technique to introduce oxygen ions into an area of the fin and then annealing to form a volume of oxide. Processes described here may be used manufacture a transistor, a stacked transistor, or a three-dimensional (3-D) monolithic stacked transistor.