Method of forming dual height solder interconnections
US5251806A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 16, 1992 |
| Grant date | Oct 12, 1993 |
| Priority date | — |
| Expiry date | Apr 16, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K3/3457
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention relates generally to a new interconnection and a method for making the same, and more particularly, to an elongated solder interconnection and a method for making the same. On an electronic carrier, a pad is formed on which a solder mass is deposited and capped with a metal layer, thereby forming an elongated solder interconnection. A further elongated solder interconnection can now be formed by forming a second solder mass on the first solder mass that has been capped by a metal layer. Additional elongated solder interconnection can be formed by capping the preceding solder mass and/or the last solder mass with a metal capping layer. Alternatively, the encapsulating layer can be in the form of a sidewall spacer formed on the sidewalls of the solder mass.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.