Method of manufacturing semiconductor wafers
US5800725A · kind A · utility
49Cited by
2References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 28, 1997 |
| Grant date | Sep 1, 1998 |
| Priority date | — |
| Expiry date | Jan 28, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02008
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing semiconductor wafers includes a double side primary polishing step, a back side etching step and a single side mirror polishing step. This method is capable of easy sensor detection of the front and back sides of the wafer, wafer processing of higher flatness level by forming etched rough surface at the back side of the double side polished wafer and setting up of wafer manufacturing process including a double side polishing step.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.