Method of forming trench transistor with metal spacers

US5801075A · kind A · utility

Assignee

• Advanced Micro Devices, Inc. · US

Inventors

• Mark I. Gardner · Mabank, US
• Robert Dawson · Austin, US
• H. Jim Fulford · Austin, US
• Frederick N. Hause · Austin, US
• Mark W. Michael · Cedar Park, US
• Bradley T. Moore · Austin, US
• Derick J. Wristers · Austin, US

Key dates

• Filing date: Oct 30, 1996
• Grant date: Sep 1, 1998
• Expiry date: Oct 30, 2016

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/027

Abstract

An IGFET with a gate electrode and metal spacers in a trench is disclosed. The IGFET includes a trench with opposing sidewalls and a bottom surface in a semiconductor substrate, metal spacers adjacent to the sidewalls and the bottom surface, a gate insulator on the bottom surface between the metal spacers, protective insulators on the metal spacers, a gate electrode on the gate insulator and protective insulators, and a source and drain adjacent to the bottom surface. A method of forming the IGFET includes implanting a doped layer into the substrate, etching completely through the doped layer and partially through the substrate to form the trench and split the doped layer into source and drain regions, applying a high-temperature anneal to diffuse the source and drain regions beneath the bottom surface, depositing a blanket layer of conductive metal over the substrate and applying an anisotropic etch to form the metal spacers, depositing a continuous insulative layer over the substrate to provide the gate insulator and the protective insulators, depositing a blanket layer of gate electrode material over the substrate, and polishing the gate electrode material so that the gate elect…