Interlevel dielectric with air gaps to lessen capacitive coupling

US5814555A · kind A · utility

Assignee

• Advanced Micro Devices, Inc. · US

Inventors

• Basab Bandyopadhyay · Austin, US
• H. Jim Fulford · Austin, US
• Robert Dawson · Austin, US
• Fred N. Hause · Austin, US
• Mark W. Michael · Cedar Park, US
• William S. Brennan · Austin, US

Key dates

• Filing date: Jun 5, 1996
• Grant date: Sep 29, 1998
• Expiry date: Jun 5, 2016

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/0002
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A reduced permittivity interlevel dielectric in a semiconductor device arranged between two levels of interconnect. The dielectric comprises a first dielectric layer preferably from a silane source deposited on a first level interconnect to form air gaps at midpoints between adjacent first interconnect structures, a second dielectric containing air gap trenches at spaced intervals across the second dielectric, and a third dielectric formed upon said second dielectric. A second interconnect level is formed on the third dielectric.