Ultra high throughput wafer vacuum processing system

US5855681A · kind A · utility

Assignee

• Applied Materials, Inc. · US

Inventors

• Dan Maydan · Los Altos Hills, US
• Sasson Somekh · Los Altos Hills, US
• Ashok Sinha · Palo Alto, US
• Kevin Fairbairn · Saratoga, US
• Christopher T. Lane · San Jose, US
• Kelly Colborne · San Jose, US
• Hari Ponnekanti · San Jose, US
• W. N. (Nick) Taylor · Dublin, US

Key dates

• Filing date: Nov 18, 1996
• Grant date: Jan 5, 1999
• Expiry date: Nov 18, 2016

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/68785
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

The present invention generally provides a cassette-to-cassette vacuum processing system which concurrently processes multiple wafers and combines the advantages of single wafer process chambers and multiple wafer handling for high quality wafer processing, high wafer throughput and reduced footprint. In accordance with one aspect of the invention, the system is preferably a staged vacuum system which generally includes a loadlock chamber for introducing wafers into the system and which also provides wafer cooling following processing, a transfer chamber for housing a wafer handler, and one or more processing chambers each having two or more processing regions which are isolatable from each other and preferably share a common gas supply and a common exhaust pump. The processing regions also preferably include separate gas distribution assemblies and RF power sources to provide a uniform plasma density over a wafer surface in each processing region. The processing chambers are configured to allow multiple, isolated processes to be performed concurrently in at least two processing regions so that at least two wafers can be processed simultaneously in a chamber with a high degree of p…