Transistor with buried insulative layer beneath the channel region
US5930642A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 9, 1997 |
| Grant date | Jul 27, 1999 |
| Priority date | — |
| Expiry date | Jun 9, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6758
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A transistor with a buried insulative layer beneath a channel region is disclosed. Unlike conventional SIMOX, the buried insulative layer has a top surface beneath the channel region that is closer than bottom surfaces of the source and drain to the top surface of the substrate. Preferably, the buried insulative layer is formed by implanting oxygen into the substrate and then performing a high-temperature anneal so that the implanted oxygen reacts with silicon in the substrate to form a continuous stoichiometric layer of silicon dioxide. Advantageously, the buried insulative layer provides a diffusion barrier and an electrical isolation barrier for the channel region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.