Method of manufacturing semiconductor wafers
US5942445A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 25, 1997 |
| Grant date | Aug 24, 1999 |
| Priority date | — |
| Expiry date | Mar 25, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02019
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to the invention, the flatness and quality can be improved while simplifying the process even when large size wafers of 200 to 300 mm or above are processed. Basic steps involved are a slicing step E for obtaining thin disc-shape wafers by slicing, a chamfering step F for chamfering the sliced wafers, a flattening step G for flattening the chamfered wafers, an alkali etching step H for removing process damage layers from the flattened wafers, and a double-side polishing step K of simultaneously polishing the two sides of the etched wafers. If necessary, a plasma etching step is used in lieu of the flattening and etching steps G and H respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.